With rapid development on integrated circuit (IC) technology, electronic devices have been following into trends of miniaturization, intelligence, high performance, and high reliability. IC packaging may not only directly affect the performance of ICs, electronic modules and systems, but also limit the miniaturization, low cost and reliability of an entire electronic system. With the continuous downsizing of electronic chips in the ICs, and the continuous increase of the integration degree, requirements of the IC packaging technology have been continually increased in electronic industries.
FIG. 1 illustrates an existing packaging structure. The packaging structure includes: a circuit 112; a connection via 118 under the circuit 112 connecting with the circuit 112; a bottom wiring layer 116 connecting with the connection via 118; a through silicon via 114 connecting with the bottom wiring layer 116; a top wiring layer 810 connecting with the through silicon via 114; and a solder ball 1010 connecting with the top wiring layer 810. Connection ports of the circuit 112 may be lead out by interconnection structures through the connection via 118, the bottom wiring layer 116, the through silicon via 114, the top wiring layer 810 and the solder ball 1010.
In existing techniques, the interconnection structures of the bottom wiring layer 116 and the top wiring layer 810 are often made of a thin layer of metal. Mechanical strength of the thin layer of metal may be relatively low, and the metal layer may be easily broken. Thus, a yield of the interconnection may be affected, and the reliability of a packaging structure may be affected as well. The disclosed methods and systems are directed to solve one or more problems set forth above and other problems.